About

Hello, I'm Shreenithi.

Projects

RISC-V based FPGA Overlays

I was a part of an SRC-funded exploration of RISCV-based FPGA Overlays and an intern at CHIPS. I worked on application-specific modifications to a RISC-V GPU and found the optimal hardware configuration for graph applications.

Image Steganography

Image Steganography on an FPGA

'Electronics prototyping' capstone

C

Contact

LinkedIn